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ISSN 2415-1076 (online) / ISSN 2413-9351 (print)
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Search for: Multiprocessors
A PARALLEL PIPELINED PACKET SWITCH ARCHITECTURE FOR MESH-CONNECTED MULTIPROCESSORS WITH INDEPENDENTLY ROUTED FLITS
(Received: 2019-04-27, Revised: 2019-06-30 , Accepted: 2019-07-22)
Jamil Al-Azzeh,Mohammed Agmal,Igor Zotov
#Multiprocessor
#Mesh topology
#Packet switching
#Input-queued switch
#FIFO-buffer
#Flit
#Pipelining
#Through-put.
Views
: 3517
Downloads
: 927
DOI
: 10.5455/jjcit.71-1556375171
Cited by
: 1
Abstract
DISTRIBUTED MUTUAL INTER-UNIT TEST METHOD FOR D-DIMENSIONAL MESH-CONNECTED MULTIPROCESSORS WITH ROUND-ROBIN COLLISION RESOLUTION
(Received: 2018-10-16, Revised: 2018-11-23 , Accepted: 2018-12-08)
Jamil Al-Azzeh
#Multiprocessors
#VLSI
#Mesh topology
#Reliability
#Testability
#Self-test
#Mutual inter-unit test.
Views
: 3221
Downloads
: 879
DOI
: 10.5455/jjcit.71-1539688899
Cited by
: 1
Abstract
IMPROVED TESTABILITY METHOD FOR MESHCONNECTED VLSI MULTIPROCESSORS
(Received: 2018-02-04, Revised: 27-Mar.-2018 and 16-Apr.-2018 , Accepted: 2018-04-25)
Jamil Al-Azzeh
#Fault tolerance
#Testability
#Built-in self-test
#Mutual inter-unit test
#Majority operator
#Mesh-connected VLSI multiprocessors
Views
: 3253
Downloads
: 841
DOI
: 10.5455/jjcit.71-1517646258
Cited by
: 1
Abstract
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